Memory Shared Component Architecture

Memory Shared		status: valid security: YES safety: ASIL_B
implements: logic_arc_int__baselibs__memory_shared uses: logic_arc_int__os__fcntl, logic_arc_int__os__stat, logic_arc_int__os__mmap included by: mod_view_sta__baselibs__baselibs
comp_arc_sta__baselibs__memory_shared		Component & Component Package Diagram

Memory Shared		status: valid security: YES safety: ASIL_B
implemented by: comp_arc_sta__baselibs__memory_shared used by: comp_arc_sta__com__ipc_binding included by: feat_arc_sta__baselibs__static_view_arch includes: logic_arc_int_op__baselibs__open, logic_arc_int_op__baselibs__update, logic_arc_int_op__baselibs__lock, logic_arc_int_op__baselibs__set_perm
logic_arc_int__baselibs__memory_shared		Logical Interface & Feature Interface View

Open		status: valid security: YES safety: ASIL_B
included by: logic_arc_int__baselibs__memory_shared
logic_arc_int_op__baselibs__open		Logical Interface Operation

Update		status: valid security: YES safety: ASIL_B
included by: logic_arc_int__baselibs__memory_shared
logic_arc_int_op__baselibs__update		Logical Interface Operation

Lock		status: valid security: YES safety: ASIL_B
included by: logic_arc_int__baselibs__memory_shared
logic_arc_int_op__baselibs__lock		Logical Interface Operation

Set Permissions		status: valid security: YES safety: ASIL_B
included by: logic_arc_int__baselibs__memory_shared
logic_arc_int_op__baselibs__set_perm		Logical Interface Operation