Architecture

Baselibs Module Architecture		status: valid security: YES safety: ASIL_B
version: 1 realizes: wp__feature_arch
doc__baselibs_module_architecture		Generic Document

Overview

A brief overview of Baselibs is described Base Libraries (doc__baselibs).

Description

A detailed description of the Baselibs module requirements is located Baselibs Requirements (doc__baselibs_requirements).

The Baselibs module provides foundational software utilities, safety mechanisms and robust infrastructure components. It comprises essential libraries organized into functional categories:

Core Utility Libraries

• bitmanipulation: Utilities for bit manipulation operations

• containers: Specialized container implementations including DynamicArray and intrusive linked lists

• utils: Reusable utilities including type traits, mathematical utilities and string manipulation helpers

Threading and Concurrency

• concurrency: Interface for parallel execution of C++ callables with thread pool management

Data Processing and Serialization

• json: JSON abstraction layer with pluggable backend support

• static_reflection_with_serialization: Binary serialization/deserialization with compile-time type reflection

File System and I/O Operations

• filesystem: Filesystem manipulation library similar to std::filesystem

Memory Management

• memory: Memory handling utilities for safety-critical applications with shared memory support

Operating System Abstraction

• os: OS Abstraction Layer (OSAL) for POSIX-like systems including Linux and QNX

Error Handling and Safety

• result: Error handling without exceptions, conforming to C++23 std::expected specification

• safecpp: Safety framework including exception prevention and overflow-safe implementations

Modern C++ Extensions and Logging

• futurecpp: C++14 Standard Library extensions with backported components

• mw::log: Logging library for automotive systems with structured logging and multiple backends

These libraries form an integrated ecosystem designed for code reuse, consistency and safety throughout the platform.

Rationale Behind Architecture Decomposition

The decomposition of Baselibs into modular libraries is motivated by the need for code reuse, maintainability and consistent APIs across the platform. This approach enables platform modules to leverage common infrastructure, reduces duplication and supports safety and security requirements.

Static Architecture

Baselibs Static View		status: valid security: YES safety: ASIL_B
tags: inspected version: 2 belongs to: feat__baselibs includes: logic_arc_int__b_r__fixqueue, logic_arc_int__b_r__fixvec, logic_arc_int__b_r__inlinevec, logic_arc_int__b_r__inlqueue, logic_arc_int__baselibs__aborts_upon_ex, logic_arc_int__baselibs__bit_manipulation, logic_arc_int__baselibs__bit_mask_operator, logic_arc_int__baselibs__condition_variable, logic_arc_int__baselibs__coverage_termination, logic_arc_int__baselibs__dynamic_array, logic_arc_int__baselibs__executor, logic_arc_int__baselibs__filesystem, logic_arc_int__baselibs__future, logic_arc_int__baselibs__intrusive_list, logic_arc_int__baselibs__json, logic_arc_int__baselibs__memory_shared, logic_arc_int__baselibs__promise, logic_arc_int__baselibs__result, logic_arc_int__baselibs__safeatomics, logic_arc_int__baselibs__safemath, logic_arc_int__baselibs__scoped_function, logic_arc_int__baselibs__shared_future, logic_arc_int__baselibs__string_view, logic_arc_int__baselibs__synchronized_queue, logic_arc_int__baselibs__task, logic_arc_int__baselibs__task_result, logic_arc_int__baselibs__utils_base64, logic_arc_int__baselibs__utils_scoped_op violated_by: feat_saf_dfa__baselibs__blocked_execution, feat_saf_dfa__baselibs__conc_file_access, feat_saf_dfa__baselibs__conc_memory_access, feat_saf_dfa__baselibs__cpu_starvation, feat_saf_dfa__baselibs__locked_ressource, feat_saf_dfa__baselibs__memory_access
feat_arc_sta__baselibs__static_view_arch		Feature & Feature Package Diagram

Baselibs Dynamic View		status: valid security: YES safety: ASIL_B
tags: inspected version: 1 belongs to: feat__baselibs
not needed, simple caller/callee sequence
feat_arc_dyn__baselibs__dynamic_view_arch		Feature Sequence Diagram

Logical Interfaces

The Baselibs feature exposes the following logical interfaces:

Title	ID	Status
Aborts Upon Exception	logic_arc_int__baselibs__aborts_upon_ex	valid
Base64	logic_arc_int__baselibs__utils_base64	valid
Bit Manipulation	logic_arc_int__baselibs__bit_manipulation	valid
Bit Mask Operator	logic_arc_int__baselibs__bit_mask_operator	valid
Condition Variable	logic_arc_int__baselibs__condition_variable	valid
Coverage Termination Handler	logic_arc_int__baselibs__coverage_termination	valid
Dynamic Array	logic_arc_int__baselibs__dynamic_array	valid
Executor	logic_arc_int__baselibs__executor	valid
Filesystem	logic_arc_int__baselibs__filesystem	valid
Fixed-Capacity Queue	logic_arc_int__b_r__fixqueue	valid
Fixed-Capacity Vector	logic_arc_int__b_r__fixvec	valid
Future	logic_arc_int__baselibs__future	valid
IJson	logic_arc_int__baselibs__json	valid
Inline-Storage Queue	logic_arc_int__b_r__inlqueue	valid
Inline-Storage Vector	logic_arc_int__b_r__inlinevec	valid
Intrusive List	logic_arc_int__baselibs__intrusive_list	valid
Memory Shared	logic_arc_int__baselibs__memory_shared	valid
Promise	logic_arc_int__baselibs__promise	valid
Result	logic_arc_int__baselibs__result	valid
Safe Atomics	logic_arc_int__baselibs__safeatomics	valid
Safe Math	logic_arc_int__baselibs__safemath	valid
Scoped Function	logic_arc_int__baselibs__scoped_function	valid
Scoped Operation	logic_arc_int__baselibs__utils_scoped_op	valid
Shared Future	logic_arc_int__baselibs__shared_future	valid
String View	logic_arc_int__baselibs__string_view	valid
Synchronized Queue	logic_arc_int__baselibs__synchronized_queue	valid
Task	logic_arc_int__baselibs__task	valid
Task Result	logic_arc_int__baselibs__task_result	valid