Example model of architectural design

This chapter only serves as an example how an architecture could be modeled in Sphinx Needs. All the needs are required to print the views which are displayed in the Static- and Interface Views. In the actual process this files would be split into multiple different files:

Feature Architecture File

Note

The feature and the logical interfaces are normally defined in the platform repo (features folder) and imported from there as sphinx needs objects. In this example it is defined here only, to hold the example consistent.

Feature 1		status: valid security: YES safety: QM
version: 1 has: comp__mod_temp_archex_sub_component_1, comp__mod_temp_archex_sub_component_2, comp__mod_temp_archex_sub_component_3, comp__mod_temp_component_example_1, comp__mod_temp_component_example_2, comp__mod_temp_component_example_3, feat_arc_sta__example_feature__sta satisfies: feat_req__example_feature__example_req includes: logic_arc_int__example_feature__if_1, logic_arc_int__example_feature__if_2, logic_arc_int__example_feature__if_3
This is the example feature which shall normally defined in the platform repo.
feat__mtef		Feature

Feature 1 Static View		status: valid security: YES safety: QM
version: 1 belongs to: feat__mtef fulfils: feat_req__example_feature__example_req includes: logic_arc_int__example_feature__if_1, logic_arc_int__example_feature__if_2, logic_arc_int__example_feature__if_3
feat_arc_sta__example_feature__sta		Feature & Feature Package Diagram

Logical Interface 1		status: valid security: YES safety: ASIL_B
version: 1 fulfils: feat_req__example_feature__example_req implemented by: comp__mod_temp_archex_sub_component_1, comp__mod_temp_component_example_1 included by: feat_arc_sta__example_feature__sta included by: feat__mtef includes: logic_arc_int_op__example_feature__op_1, logic_arc_int_op__example_feature__op_2
Logical Interface 1 provides the primary control and communication interface for the feature. It is implemented by sub-component 1 which handles the core functionality.
logic_arc_int__example_feature__if_1		Logical Interface & Feature Interface View

Logical Interface 2		status: valid security: YES safety: ASIL_B
version: 1 fulfils: feat_req__example_feature__example_req implemented by: comp__mod_temp_archex_sub_component_2, comp__mod_temp_component_example_2 used by: comp__mod_temp_archex_sub_component_1, comp__mod_temp_archex_sub_component_2 included by: feat_arc_sta__example_feature__sta included by: feat__mtef includes: logic_arc_int_op__example_feature__op_3, logic_arc_int_op__example_feature__op_4
Logical Interface 2 provides support for data processing and communication between sub-components. It is implemented by sub-component 2 which handles data flow and processing operations.
logic_arc_int__example_feature__if_2		Logical Interface & Feature Interface View

Logical Interface 3		status: valid security: YES safety: ASIL_B
version: 1 fulfils: feat_req__example_feature__example_req implemented by: comp__mod_temp_component_example_3 included by: feat_arc_sta__example_feature__sta included by: feat__mtef includes: logic_arc_int_op__example_feature__op_5, logic_arc_int_op__example_feature__op_6, logic_arc_int_op__example_feature__op_7, logic_arc_int_op__example_feature__op_8
Logical Interface 3 provides additional support and monitoring capabilities for the feature.
logic_arc_int__example_feature__if_3		Logical Interface & Feature Interface View

Logical Operation 1		status: valid security: YES safety: ASIL_B
version: 1 included by: logic_arc_int__example_feature__if_1
logic_arc_int_op__example_feature__op_1		Logical Interface Operation

Logical Operation 2		status: valid security: YES safety: ASIL_B
version: 1 included by: logic_arc_int__example_feature__if_1
logic_arc_int_op__example_feature__op_2		Logical Interface Operation

Logical Operation 3		status: valid security: YES safety: ASIL_B
version: 1 included by: logic_arc_int__example_feature__if_2
logic_arc_int_op__example_feature__op_3		Logical Interface Operation

Logical Operation 4		status: valid security: YES safety: ASIL_B
version: 1 included by: logic_arc_int__example_feature__if_2
logic_arc_int_op__example_feature__op_4		Logical Interface Operation

Logical Operation 5		status: valid security: YES safety: ASIL_B
version: 1 included by: logic_arc_int__example_feature__if_3
logic_arc_int_op__example_feature__op_5		Logical Interface Operation

Logical Operation 6		status: valid security: YES safety: ASIL_B
version: 1 included by: logic_arc_int__example_feature__if_3
logic_arc_int_op__example_feature__op_6		Logical Interface Operation

Logical Operation 7		status: valid security: YES safety: ASIL_B
version: 1 included by: logic_arc_int__example_feature__if_3
logic_arc_int_op__example_feature__op_7		Logical Interface Operation

Logical Operation 8		status: valid security: YES safety: ASIL_B
version: 1 included by: logic_arc_int__example_feature__if_3
logic_arc_int_op__example_feature__op_8		Logical Interface Operation

Module View File

Module 1		status: valid security: YES safety: ASIL_B
version: 1 includes: comp__mod_temp_archex_sub_component_1, comp__mod_temp_archex_sub_component_2, comp__mod_temp_component_example_1, comp__mod_temp_component_example_2
This module describes the mapping and implementation of logical interfaces through their implementing components and sub-components. Logical Interface 1 is implemented by Component 1 and Sub-Component 1 (core control logic, operations 1 and 2). Logical Interface 2 is implemented by Component 2 and Sub-Component 2 (data flow and processing, operations 3 and 4).
mod__mtef_archex_module_1		Module

Module 1 Static View
version: 1 includes: comp__mod_temp_component_example_1, comp__mod_temp_component_example_2
mod_view_sta__example_feature__1		Module Architecture Static View

Module 2		status: valid security: YES safety: ASIL_B
version: 1 includes: comp__mod_temp_component_example_3
This module contains Component 3 which implements Logical Interface 3 with support and monitoring capabilities. This is Module 2.
mod__mtef_archex_module_2		Module

Module 2 Static View
version: 1 includes: comp__mod_temp_component_example_3
mod_view_sta__example_feature__2		Module Architecture Static View

Feature or Component Architecture File(s)

Component 1		status: valid security: YES safety: ASIL_B
version: 1 consists of: comp__mod_temp_archex_sub_component_1, comp__mod_temp_archex_sub_component_2, comp__mod_temp_archex_sub_component_3 belongs to: feat__mtef has: comp_arc_sta__example_feature__comp_1 implements: logic_arc_int__example_feature__if_1 included by: mod__mtef_archex_module_1, mod_view_sta__example_feature__1
Example Component 1 description.
comp__mod_temp_component_example_1		Component

Component 2		status: valid security: YES safety: ASIL_B
version: 1 belongs to: feat__mtef satisfies: comp_req__example_feature__example_req implements: logic_arc_int__example_feature__if_2 included by: mod__mtef_archex_module_1, mod_view_sta__example_feature__1
Example Component 2 description.
comp__mod_temp_component_example_2		Component

Component 3		status: valid security: YES safety: QM
version: 1 belongs to: feat__mtef implements: logic_arc_int__example_feature__if_3 included by: mod__mtef_archex_module_2, mod_view_sta__example_feature__2
Example Component 3 description.
comp__mod_temp_component_example_3		Component

Component 1 Static View		status: valid security: NO safety: ASIL_B
version: 1 belongs to: comp__mod_temp_component_example_1 fulfils: comp_req__example_feature__example_req
comp_arc_sta__example_feature__comp_1		Component Package Diagram

Component 1_1		status: valid security: NO safety: ASIL_B
version: 1 forms part of: comp__mod_temp_component_example_1 belongs to: feat__mtef implements: logic_arc_int__example_feature__if_1 uses: logic_arc_int__example_feature__if_2 included by: mod__mtef_archex_module_1
Sub-Component 1 implements Logical Interface 1 and provides the core control logic. This module handles the primary operations required by the feature interface and coordinates with other sub-components through Logical Interface 2 for data exchange and synchronization.
comp__mod_temp_archex_sub_component_1		Component

Component 1_2		status: valid security: NO safety: ASIL_B
version: 1 forms part of: comp__mod_temp_component_example_1 belongs to: feat__mtef implements: logic_arc_int__example_feature__if_2 uses: logic_arc_int__example_feature__if_2 included by: mod__mtef_archex_module_1
Sub-Component 2 implements Logical Interface 2 and provides data processing capabilities. This module manages data flow, processing, and communication services required by the feature. It ensures proper data handling and supports the operations defined in the logical interfaces.
comp__mod_temp_archex_sub_component_2		Component

Component 1_3		status: valid security: NO safety: ASIL_B
version: 1 forms part of: comp__mod_temp_component_example_1 belongs to: feat__mtef
Example Sub-Component 3 description as part of Component 1.
comp__mod_temp_archex_sub_component_3		Component

Requirements for the Example

Note

The stakeholder requirements shall be defined in the platform repo (stakeholder requirements folder) and imported as sphinx needs objects. Here it is defined only to hold the example together and prevent errors because the sphinx needs meta model have mandatory links to it.

Example Stkh Req		status: valid security: YES safety: ASIL_B
rationale: needed for archdes example reqtype: Functional valid_from: v1.0.0 version: 1 derives: feat_req__example_feature__example_req
The platform shall provide the feature ….
stkh_req__mtfn__example_req		Stakeholder Requirement

Note

The feature requirements shall be defined in the platform repo (in the requirements folder of the (features)) and imported as sphinx needs objects. Here it is defined only to hold the example together and prevent errors because the sphinx needs meta model have mandatory links to it.

Example Feature Req		status: valid security: YES safety: ASIL_B
reqtype: Functional valid_from: v1.0.0 version: 1 derived from: stkh_req__mtfn__example_req derives: comp_req__example_feature__example_req satisfied by: feat__mtef fulfilled by: feat_arc_sta__example_feature__sta, logic_arc_int__example_feature__if_1, logic_arc_int__example_feature__if_2, logic_arc_int__example_feature__if_3
The feature shall provide the functionality to ….
feat_req__example_feature__example_req		Feature Requirement

Example Component Req		status: valid security: YES safety: ASIL_B
reqtype: Functional version: 1 derived from: feat_req__example_feature__example_req satisfied by: comp__mod_temp_component_example_2 fulfilled by: comp_arc_sta__example_feature__comp_1
The component shall provide the Logical Operation 4 to get the ..
comp_req__example_feature__example_req		Component Requirement